Cyclic Redundancy Checks (CRCs) are the most widely used error detection mechanism in everyday life. Whenever you transmit and receive data or store and retrieve data, you need to make sure errors are not made or at least know when they happen. CRCs are such an effective mechanism to achieve this and are easy to implement and use. They are used in network communications (wired networks such as ethernet, wireless networks such as LAN and cellular), storage devices (hard drives, SSDs, CDs, DVDs), file compression protocols such as zip and rar and many many more to list here. Literally trillions of CRCs are being computed on earth every second.
As I implemented CRC at my job, I got curious some aspects of it which lead to writing this blog. While it is very easy to describe CRC as a simple remainder generation scheme using linear feedback shift register (LFSR), I couldn't help but notice that CRC is a linear block code and that LFSR is an IIR filter which is basically an LTI system.
- So if CRC is considered a linear block code (LBC), how does it fit in the LBC theory?
- What is its generator matrix (GM)? Where does the polynomial fit in the picture?
- Why is a feedback structure used for code generation?
- Why is it used only for error detection and not error correction?
- What is its error detection capability?
- What kind of polynomials are used in CRC generation?
